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I have a number of .c and .h files with some parts of the code disabled by putting the code block in pre-processor directives e.g.
#ifdef FOOBAR
// some code that can be compiled if needed by defining FOOBAR in pre-processor.
#endif
No I need to define FOOBAR such that its defined for every file that is compiled by gcc using make.
Is there a way to do this with some option to make or Makefile ?
Thanks.
914
The syntax is compiler specific, for gcc use the -D option like so: -Dcpp_variable . Show activity on this post. Take a variable in Makefile and whatever you need to define in it just add -DXXX. Where XXX in you case is cpp_variable.
A preprocessor variable is specified in a %DECLARE statement with the FIXED, CHARACTER, or INITIAL attribute. No other attributes can be declared for a preprocessor variable, and attributes must not be repeated. (Other attributes are supplied by the preprocessor, however.)
Preprocessor directives, such as #define and #ifdef , are typically used to make source programs easy to change and easy to compile in different execution environments. Directives in the source file tell the preprocessor to take specific actions.
Boolean type preprocessor variables can be defined from the UNIX command-line using the "-D" flag to gcc, i.e. "-DDEBUG".
Add the compiler option -DFOOBAR to the make variable CFLAGS
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