Is there a way using GNU Make of compiling all of the C files in a directory into separate programs, with each program named as the source file without the .c extension?
Separate compilation is an integral part of the standard for the C programming language. When a C source code file is compiled there are two tasks performed by the compiler. First, the file is compiled into a format called an object file.
SRCS = $(wildcard *.c) PROGS = $(patsubst %.c,%,$(SRCS)) all: $(PROGS) %: %.c $(CC) $(CFLAGS) -o $@ $<
I don't think you even need a makefile - the default implicit make rules should do it:
$ ls src0.c src1.c src2.c src3.c $ make `basename -s .c *` cc src0.c -o src0 cc src1.c -o src1 cc src2.c -o src2 cc src3.c -o src3
Edited to make the command line a little simpler.
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