How to force make to always rebuild a file

Question

I have a version.c file in my project that contains current revision of the project and some other stuff that is passed as a definition (-D compiler option) from makefile.

I know that to force make to compile version.c always regardless of modification date I can touch version.c.

Is there a makefile only way to achieve this? If I write .PHONY : version.o the object file doesn't get build at all.

EDIT: Here is my makefile:

export CC = gcc   export MODULES = $(sort \      sys \      cim \      version \ )  export FILES = $(sort \              main.c \              cim.c \              version.c \ )  VPATH = $(MODULES)  OBJS = $(FILES:.c=.o)  INCLUDES = $(addprefix -I,$(MODULES))  all:$(OBJS)     $(CC) $(INCLUDES) $(OBJS) -o main.exe   clean:     rm -rf *.o *.exe  cim.o: cim.c main.o: main.c cim.o version.o: version.c  .PHONY: version.o  .c.o :     $(CC) $(CFLAGS) $(INCLUDES) -c $< 

Answer 1

The classic way to do it is:

version.o:   .FORCE  .FORCE: 

(and you might add .PHONY: .FORCE). The file '.FORCE' is presumed not to exist, so it is always 'created', so version.o is always out of date w.r.t it, so version.o is always compiled.

I'm not sure that making version.o into a phony file is correct; it is actually a real file, not a phony one.