Possible Duplicate:
How to get the second dependency file using Automatic Variables in a Makefile?
I am using GNU make, and I'm using automatic variables such at $<
, $^
etc. I know that $<
is just the first prerequisite, and $^
is all the prerequisites. Is there a way to obtain just the second prerequisite?
The variable $@ represents the name of the target and $< represents the first prerequisite required to create the output file.
Within the context of an individual rule, Make automatically defines a number of special variables. These variables can have a different value for each rule in a makefile and are designed to make writing rules simpler. These variables can only be used in the recipe portion of a rule.
And in your scenario, $MAKE is used in commands part (recipe) of makefile. It means whenever there is a change in dependency, make executes the command make --no-print-directory post-build in whichever directory you are on.
$(patsubst PATTERN,REPLACEMENT,TEXT) Finds whitespace-separated words in TEXT that match PATTERN and replaces them with REPLACEMENT. Here PATTERN may contain a % which acts as a wildcard, matching any number of any characters within a word.
Assuming your prerequisites are regular tokens,
echo $(word 2,$^)
I often find myself giving the first argument a special position, and accessing the remaining prerequisites with
echo $(filter-out $<,$^)
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