Channel/lane shuffling for SSE and AVX?

Question

What SSE/AVX instructions shuffle the lanes from a to look like b and c?

float4 a = {data[0], data[1], data[2], data[3]};
float4 b = {data[1], data[2], data[3], data[0]};  // lanes shifted left
float4 c = {data[3], data[0], data[1], data[2]};  // lanes shifted right

float8 a = {data[0], data[1], data[2], data[3],
            data[4], data[5], data[6], data[7]};
float8 b = {data[1], data[2], data[3], data[4],
            data[5], data[6], data[7], data[0]};  // lanes shifted left
float8 c = {data[7], data[0], data[1], data[2],
            data[3], data[4], data[5], data[6]};  // lanes shifted right

Background:

I have an algorithm that requires the values from its neighbors points; this means that I'm currently mixing aligned loads and unaligned loads:

(
      plate[row + 1][column]    // aligned
    + plate[row - 1][column]    // aligned
    + plate[row][column + 1]    // unaligned
    + plate[row][column - 1]    // unaligned
    + (4 * plate[row][column])  // aligned
) / 8;

Here it is in SSE:

__m128 bottom  = _mm_load_ps(&from[row-1][column]);
__m128 left    = _mm_loadu_ps(&from[row][column-1]);
__m128 middle  = _mm_load_ps(&from[row][column]);
__m128 right   = _mm_loadu_ps(&from[row][column+1]);
__m128 top     = _mm_load_ps&from[row+1][column]);

(top + bottom + left + right + _mm_set1_ps(4.0f) * middle) * _mm_set1_ps(0.125f);

I had the realization that the values in current and either left or right differ by only one value. So I had the idea that instead of doing 2 unaligned loads, I could perhaps shuffle the lanes and then insert the one value that is different. I need to check latency/throughputs on the instructions to see if will be any faster, but I am not familiar with any of these kinds of SSE/AVX instructions.

Answer 1

On recent Intel CPUs (Core i7 et al) the misaligned load is a reasonable approach, but on older CPUs it's relatively expensive. An alternate approach is to use _mm_alignr_epi8 (PALIGNR) - typically you iterate along a row and maintain 3 consecutive vectors - after each iteration you shuffle these vectors along one and then load a new vector, so there is only one load per iteration.

__m128 va = _mm_setzero_ps();
__m128 vb = _mm_load_ps(&from[row][0]);
for (col = 0; col < N; col += 4)
{
    __m128 vc = _mm_load_ps(&from[row][col + 4]);

    __m128 centre = vb;
    __m128 left = (__m128)_mm_alignr_epi8((__m128i)va, (__m128i)vb, sizeof(float));
    __m128 right = (__m128)_mm_alignr_epi8((__m128i)vb, (__m128i)vc, 3 * sizeof(float));

    // do stuff ...

    va = vb;  // shuffle vectors along
    vb = vc;
}

AVX is a bit trickier due to the limitations of 128 bit lanes - you might be better off sticking with unaligned loads.