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Why use this 2 DFF method every time a button press is involved?

Tags:

verilog

fpga

I have been reading verilog code online and have noticed this in many of the code examples. Whenever an input is needed from a hardware source such as a button press, the input is copied to a flip flop and then AND'd with the invert of the input. I dont know if this made much sense but in code here it is:

input btn;
reg dff1, dff2;
wire db_tick;

always @ (posedge clock) dff1 <= btn;
always @ (posedge clock) dff2 <= dff1;

assign db_tick = ~dff1 & dff2;

And then db_tick is used as the button press.

In some cases this is also used as a rising edge detector, but cant a rising edge detector easily be implemented with always@(posedge signal)

like image 825
ipunished Avatar asked Dec 18 '25 14:12

ipunished


1 Answers

It's called a monostable multivibrator or, specifically for digital circuits, a one-shot. The purpose of the circuit is to change an edge into a single cycle pulse.

When connected directly to a physical switch it can be a way to effect switch debouncing, but that's not really a good use for it. It's hard to say what the intent is in the code without more context.


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