Which floating point operations generate quiet/signalling NaN?

Question

I'm designing an FPU in a logic simulator and I need to know which operations generate the two kinds of NaNs (quiet: qNaN and signalling: sNaN)

edit: I've found out that arithmetic operations like 0*infinity always generate qNaNs (source: http://www.savrola.com/resources/NaN.html). What I still don't know however is if there are any other ways to get sNaNs beside setting a variable to sNaN's bit pattern.

Answer 1

I assume you have some sort of textbook or spec on whatever floating point spec you intend to simulate. Look in there for definitions.

For something more general, you can read: http://en.wikipedia.org/wiki/NaN

Here is what wikipedia says on sNaNs:

Signaling NaN
Signaling NaNs, or sNaNs, are special forms of a NaN that when consumed by most operations should raise an invalid exception and then, if appropriate, be "quieted" into a qNaN that may then propagate. They were introduced in IEEE 754. There have been several ideas for how these might be used

• Filling uninitialized memory with signaling NaNs would produce an invalid exception if the data is used before it is initialized
• Using an sNaN as a placeholder for a more complicated object, such as:
  • A representation of a number that has underflowed
  • A representation of a number that has overflowed
  • Number in a higher precision format
  • A complex number