When inserting a shell script inside a Makefile we have (?) to use a double dollar sign ($$) to make reference to variables. Why is that so?
for number in 1 2 3 4 ; do \ echo $$number ; \ done
$$ means be interpreted as a $ by the shell. the $(UNZIP_PATH) gets expanded by make before being interpreted by the shell.
$@ (“dollar at”) is part of the Makefile language. In your recipe, it refers to the thing it is going to build (above, that's prog ). Mnemonic: it's the target you're aiming at. $^ (“dollar caret”) refers to the dependencies/inputs (above, that's main. c ).
$$ is the pid (process id) of the shell interpreter running your script. It's different for each process running on a system at the moment, but over time the pid wraps around, and after you exit there will be another process with same pid eventually.As long as you're running, the pid is unique to you.
$$ means the process ID of the currently-running process.
As per gnu make official doc:
Variable and function references in recipes have identical syntax and semantics to references elsewhere in the makefile. They also have the same quoting rules: if you want a dollar sign to appear in your recipe, you must double it (‘$$’). For shells like the default shell, that use dollar signs to introduce variables, it’s important to keep clear in your mind whether the variable you want to reference is a make variable (use a single dollar sign) or a shell variable (use two dollar signs).
So in short:
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