What is the Makefile Target `.c.o` for?

Question

Someone recently mentioned the target .c.o in Makefiles for cross compatability, but I fail to understand its purpose. Can anyone clarify?

Answer 1

It's an old-fashioned suffix rule. The more up-to-date way to do it is to use a pattern rule:

%.o : %.c 

Answer 2

It's a canned rule for translating .c files, i.e. C modules, to .o object files. It exists so you don't have to write this rule yourself and is parameterized by Make variables such as CC (the C compiler to use), CFLAGS (compiler flags), etc.

So, if you use this implicit rule to compile C modules and don't tinker with any Make variables, then the person building your code can specify a compiler and flags on the command line without editing the Makefile.