I have a Makefile with the following structure (working example).
.PHONY: image flashcard put-files
put-files:
@echo "=== put-files"
image:
@echo "=== image"
flashcard:
@echo "=== flashcard"
all: put-files image flashcard
@echo "Done"
I expect that a simple make
would build all three targets, but this is not so:
% make
=== put-files
But if I explicitly specify the target, the dependencies are built as well:
% make all
=== put-files
=== image
=== flashcard
Done
What am I doing wrong?
This means that when you do a "make all", make always thinks that it needs to build it, and so executes all the commands for that target. Those commands will typically be ones that build all the end-products that the makefile knows about, but it could do anything.
make follows the instructions of the Makefile and converts source code into binary for the computer to read. make install installs the program by copying the binaries into the correct places as defined by ./configure and the Makefile.
By default, the goal is the first target in the makefile (not counting targets that start with a period). Therefore, makefiles are usually written so that the first target is for compiling the entire program or programs they describe.
A simple makefile consists of “rules” with the following shape: target … : prerequisites … recipe … … A target is usually the name of a file that is generated by a program; examples of targets are executable or object files. A target can also be the name of an action to carry out, such as ' clean ' (see Phony Targets).
A simple make
will build the first target in the list, which is put-files
.
make all
will build the target all
. If you want all
to be the default, then move it to the top of the list.
To understand what the .PHONY
does, see http://www.gnu.org/s/hello/manual/make/Phony-Targets.html
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