What does SSE instructions optimize in practice, and how does the compiler enables and use them?

Question

SSE and/or 3D now! have vector instructions, but what do they optimize in practice ? Are 8 bits characters treated 4 by 4 instead of 1 by 1 for example ? Are there optimisation for some arithmetical operations ? Does the word size have any effect (16 bits, 32 bits, 64 bits) ?

Does all compilers use them when they are available ?

Does one really have to understand assembly to use SSE instructions ? Does knowing about electronics and gate logics helps understanding this ?

Answer 1

Background: SSE has both vector and scalar instructions. 3DNow! is dead.

It is uncommon for any compiler to extract a meaningful benefit from vectorization without the programmer's help. With programming effort and experimentation, one can often approach the speed of pure assembly, without actually mentioning any specific vector instructions. See your compiler's vector programming guide for details.

There are a couple portability tradeoffs involved. If you code for GCC's vectorizer, you might be able to work with non-Intel architectures such as PowerPC and ARM, but not other compilers. If you use Intel intrinsics to make your C code more like assembly, then you can use other compilers but not other architectures.

Electronics knowledge will not help you. Learning the available instructions will.

Answer 2

In the general case, you can't rely on compilers to use vectorized instructions at all. Some do (Intel's C++ compiler does a reasonable job of it in many simple cases, and GCC attempts to do so too, with mixed success)

But the idea is simply to apply the same operation to 4 32-bit words (or 2 64 bit values in some cases).

So instead of the traditional `add´ instruction which adds together the values from 2 different 32-bit wide registers, you can use a vectorized add, which uses special, 128-bit wide registers containing four 32-bit values, and adds them together as a single operation.