We are inside write_four_registers_and_readback()
and next instruction is to call delay(10)
:
004002a4: b.n 0x4002f4 <write_four_registers_and_readback+172>
78 delay(10);
From the ARM Instruction Set we learn that b
is branch, followed by a two letter mnemonic
Example:
CMP R1,#0 ; Compare R1 with zero and branch to fred
; if R1 was zero, otherwise continue
BEQ fred ; to next instruction.
But this .n
doesn't seem to be included in the table of two-letter mnemonics ... frankly it is not a two-letter mnemonic either. What does it mean.
Furthermore, what means the number 0x4002f4
? Is it just an absolute representation of the address put in <>
? Or something else - point 4.4.3 Assembler syntax
doesn't seem to explain.
Device is SAM4S
and toolchain is arm-none-eabi-gcc
.
S. is an optional suffix. If S is specified, the condition code flags are updated on the result of the operation (see Conditional execution). Rd.
The ARM instruction stream is a sequence of word-aligned words. Each ARM instruction is a single 32-bit word in that stream. The encoding of an ARM instruction is: Table 5.1 shows the major subdivisions of the ARM instruction set, determined by bits[31:25, 4].
The add instruction adds together its two operands, storing the result in its first operand. Note, whereas both operands may be registers, at most one operand may be a memory location. Syntax. add <reg>,<reg>
You have pretty ancient reference material there, but a modern toolchain. When Thumb-2 was introduced, ARM also introduced a new Unified Assembler Language which allows writing code which can be assembled to either ARM or Thumb with (potentially) no modification. Most, if not all, recent toolchains default to UAL (although many still support the legacy syntaxes by some means).
In UAL, the .n
and .w
suffixes apply to mnemonics which have both a 16-bit Thumb ("narrow") and 32-bit Thumb-2 ("wide") encoding*. If unspecified, the assembler will automatically choose an appropriate encoding, but if a particular encoding is desired (e.g. forcing a 32-bit encoding where the assembler would choose the 16-bit version in order to pad code for cache alignment), then the suffix can be specified.
Disassemblers will generally emit the suffixes to ensure that the output, if passed back through an assembler, will result in the exact same object code.
So, what you have there is a 16-bit Thumb branch instruction to address 0x4002f4
, which happens to be 172 bytes past the symbol write_four_registers_and_readback
.
* Technically, all ARM encodings are also "wide", and thus may take a .w
suffix, but it's entirely redundant in that case.
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