When compiling your CUDA code, you have to select for which architecture your code is being generated. nvcc
provides two parameters to specify this architecture, basically:
arch
specifies the virtual arquictecture, which can be compute_10
, compute_11
, etc.code
specifies the real architecture, which can be sm_10
, sm_11
, etc.So a command like this:
nvcc x.cu -arch=compute_13 -code=sm_13
Will generate 'cubin' code for devices with 1.3 compute capability. Please correct me if I'm wrong. Which I would like to know is which are the default values for these two parameters? Which is the default architecture that nvcc uses when no value for arch
or code
is specified?
NVCC is a compiler driver which works by invoking all the necessary tools and compilers like cudacc, g++, cl, etc. NVCC can output either C code (CPU Code) that must then be compiled with the rest of the application using another tool or PTX or object code directly.
nvcc The main wrapper for the NVIDIA CUDA Compiler suite. Used to compile and link both host and gpu code. cuobjdump The NVIDIA CUDA equivalent to the Linux objdump tool.
nvcc is the compiler driver used to compile both . cu and . cpp files. It uses the cl.exe (on Windows) or gcc (on Linux) executable that it can find as the compiler for host code.
Ok, I've finally managed to discover the default values. My fault for not reading the whole chapter on GPU compilation in the NVCC documentation from the beginning to the very very end. So,
nvcc x.cu
is equivalent for
nvcc x.cu –arch=compute_10 -code=sm_10,compute_10
Those are the default values. The compilation is performed by default to the virtual architecture compute_10
, and the a.out
that results from the compilation will include the CUBIN code for the sm_10
real architecture, and the PTX assembly code for the compute_10
architecture, which will be recompiled 'just in time' by the CUDA driver if your architecture is greater than sm_10
.
I believe the default is compute_10
, as you cannot use any compute_13 features unless you specify explicitly that that's what you want. (Presumably the NVCC documentation that comes with the CUDA toolkit specifies, but I can't find a link online).
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