I am a VHDL noob, trying to create a few constants and assign hex numbers to them, however I keep getting errors.
I want the constant FOO_CONST
to be equal to 0x38
Like this...
constant FOO_CONST : integer := x"38";
The error:
Type integer does not match with a string literal
I've tried a few variants with no success.
I'd appreciate any help. Thanks!
-Mike
In VHDL, hex is a much easier way to set bigger vectors instead of regular binary. This is because one symbol of hex is 4-bits of binary. For example: signal my_slv : std_logic_vector(15 downto 0);
It is possible to create constants in VHDL using this syntax: constant <constant_name> : <type> := <value>; Constants can be declared along with signals in the declarative part of a VHDL file, or they can be declared along with variables in a process.
You can specify a base for integers by using the format base#value#
:
constant FOO_CONST : integer := 16#38#;
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