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What is the name of gcc's intrinsic for comparing __m256 and __m256i (AVX instruction set)?
780
AVX uses sixteen YMM registers to perform a single instruction on multiple pieces of data (see SIMD). Each YMM register can hold and do simultaneous operations (math) on: eight 32-bit single-precision floating point numbers or. four 64-bit double-precision floating point numbers.
SSE (streaming SIMD extensions) and AVX (advanced vector extensions) are SIMD (single instruction multiple data streams) instruction sets supported by recent CPUs manufactured in Intel and AMD.
As said in the Intel AVX documentation
_mm256_cmp_ps, _mm256_cmp_pd
etc
Note that instead of having multiple comparison instructions, you have to pass an enum indicating the comparison done. E.g :
res = _mm256_cmp_ps(a,b, _CMP_LT_OQ); // AVX res = a < b
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