Prevent GNU make from expanding dollar signs in environment variables

Question

Is there any way to make GNU Make interpret dollar signs literally in environment variables?

Take this makefile:

echoFOO:
        echo '$(FOO)'

Run it like this:

$ FOO='a$bc' make
echo 'ac'
ac

I'd like this to echo a$bc literally, but I can't find a way to get GNU Make to keep its damn hands off my environment variables.

Answer 1

Two ways to get the result you want that I can see. Trade-offs with both.

$ cat Makefile
all: echoFOO echovFOO

echoFOO:
        echo '$(FOO)'

echovFOO:
        echo '$(value vFOO)'
$ FOO='a$$bc' vFOO='a$bc' make
echo 'a$bc'
a$bc
echo 'a$bc'
a$bc