moving from make to cmake: how to use build target with wildcards

Question

I'm trying to convert an makefile-build to cmake (to avoid the current state of being forced to take care for the windows-build env based on make/msdev and the linux based on make/gcc).

In this project, I've found a directory full of sourcecode files that get, based on a naming convention, compiled to libraries. (e.g. c1223.c => c1223.dll (or .sl) )

The current makefile consists of some directives using wildcards, e.g.:

LIB_NO  = $(basename $(subst s,,$@))

OBJ = $(OBJ_PATH)/s$(LIB_NO).o $(OBJ_PATH)/c$(LIB_NO).o\
          $(OBJ_PATH)/b$(LIB_NO).o

$(OBJ_PATH)/%.o : %.c
    -$(CC) $(CFLAGS) -I$(PWD) -c $< -o $@
    -(chmod a+w $@;true)

I've searched for a while but can't find anything that seems to work. Is it even possible with cmake to let it generate a wildcard based build?

Any comments, hints and suggestions are very welcome :)

cheers Markus

Answer 1

You can use fairly primitive globbing (there's no regular expression syntax that I can see).

file(GLOB TESTSRCS "test/src/*.cpp")

# Compile the test sources.
add_executable(Tests ${TESTSRCS})

target_link_libraries(Tests ${LIB} gtest gtest_main)

The actual makefiles do not seem to contain wildcard searches inside them. If you add new files you will need to re-run cmake.

What I don't know is how you would manage to wrap up the library creation in a single macro if you have many different library files to generate.

You might be able to do something like this if there's only one c file per library:

file(GLOB libfiles "path/to/libs/c*.c")

foreach(libfile ${libfiles})
    GET_FILENAME_COMPONENT(libname ${libfile} NAME) # remove the '.c' part (untested, hopefully this will work)
    add_library(${libname} ${libfile})
endforeach(libfile)

If anybody else has a better solution, I would also like to learn it.