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Is lw $s0,8($0) the same as lw $s0,0($v0)?
I do not see the difference. I think the 8 represents the offset, which means we need the addres of $0 and add 2 (8/4) to the address.
EDIT:
My question is about the lw instruction and the MIPS register set. Its pretty difficult for me to understand how the offset exactly works...
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The LW instruction loads data from the data memory through a specified address, with a possible offset, to the. destination register. It's syntax is: LW $destination register's address, offset($source register's address).
To operate on data in main memory, the data is first copied into registers. A load operation copies data from main memory into a register. A store operation copies data from a register into main memory . When a word (4 bytes) is loaded or stored the memory address must be a multiple of four.
You can also load or store 32-bit quantities -- a complete word instead of just a byte -- with the lw and sw instructions. Most programming languages support several 32-bit data types. The MIPS architecture requires words to be aligned in memory; 32-bit words must start at an address that is divisible by 4.
They are not the same, although in some circumstances they will behave alike.
The format of the lw instruction is as follows:
lw RegDest, Offset(RegSource)
where RegDest and RegSource are MIPS registers, and Offset is an immediate.
It means, load into register RegDest the word contained in the address resulting from adding the contents of register RegSource and the Offset specified. The resulting source address must be word-aligned (i.e. multiple of 4)
Therefore,
lw $s0,8($0) means to load in $s0 the contents of the word located at address specified by $0 plus 8. As $0 is register $zero which will always contain the constant zero, it will load the word located in absolute address 8 into $s0.
lw $s0,0($v0) means to load in $s0 the contents of the word located at the address specified by $v0. If $v0 contains the value 8 then both instructions have the same effect. If $v0 is not a multiple of 4, the instruction will generate an addressing trap.
Usually lw is a pseudoinstruction in the sense that the assembler may emmit more than one instruction to accomplish the instruction. The offset (displacement) has to be a 16-bit signed value.
If your instruction has an immediate with more bits, the assembler will usually use a temporary register ($at) to hold the contents of the immediate and then emmit equivalent instructions to perform the intended behavior. You may see this in action using a dissassembler or a MIPS monitor (also inspecting the code with MARS simulator).
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