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Makefile error: No rule to make target

Tags:

makefile

SOURCES = server.c

TARGET = Server

CC = gcc

all: $(SOURCES) $(TARGET) 


$(CC) $(SOURCES) -o $(TARGET) 

clean:


rm -rf $(TARGET) 

Above is the Makefile of my web server. Though server.c file is in the directory this gives the fallowing error

make: *** No rule to make target `Server', needed by `all'.  Stop.

What is the mistake I've made and how to solve it.

like image 487
Udara S.S Liyanage Avatar asked May 03 '11 19:05

Udara S.S Liyanage


People also ask

Why does it say no rule to make target?

The message is formatted as: *** No rule to make target 'file supposed to be input', needed by 'the file going to make'. That is, no rules are defined to locate the input file. This error occurs when there are errors or inconsistencies in build configurations.

What does $() mean in Makefile?

The $@ and $< are called automatic variables. The variable $@ represents the name of the target and $< represents the first prerequisite required to create the output file.

What is all Target in Makefile?

all target is usually the first in the makefile, since if you just write make in command line, without specifying the target, it will build the first target. And you expect it to be all . all is usually also a . PHONY target.

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Make is Unix utility that is designed to start execution of a makefile. A makefile is a special file, containing shell commands, that you create and name makefile (or Makefile depending upon the system).


1 Answers

I think your makefile got garbled somewhere between your machine and the post, but there is a simple fix that I think will work:

all: $(SOURCES)

That will (probably) solve the problem and make the error go away-- if that's all you want then you can stop reading. But there are still things wrong with this makefile, so we can make some more improvements.

First, a little adjustment to make it match what I think your makefile really says:

SOURCES = server.c

TARGET = Server

CC = gcc

all: $(SOURCES) $(TARGET)
    $(CC) $(SOURCES) -o $(TARGET) 

clean:
    rm -rf $(TARGET) 

The first three lines and the clean rule are all right, we'll ignore those. Now we give TARGET its own rule and straighten out the prerequisites:

all: $(TARGET)

$(TARGET): $(SOURCES)
    $(CC) $(SOURCES) -o $(TARGET) 

Now we make all PHONY (since it doesn't really make a file called "all"), and introduce automatic variables to make the TARGET rule more robust and less redundant:

.PHONY: all
all: $(TARGET)

$(TARGET): $(SOURCES)
    $(CC) $< -o $@ 

There's more to learn if your codebase gets more complicated, but that'll do for now.

like image 172
Beta Avatar answered Oct 31 '22 02:10

Beta