Makefile $@ variable-what is it used for?

Question

I am new to learning make files.I was reading this post. could anyone please tell me what is $@ variable used for inside a makefile?

Answer 1

The $@ stands for the target of the current rule. More info here.

Answer 2

It's used to refer to the target, for example:

test:
        gcc -o $@ [email protected]

Would compile program test from test.c if you ran make test