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Is there a simple way to automatically load a file containing local configurations into a Makefile?
I have a file, .env, containing key=value pairs on each line:
var1=val1
var2=val2
Currently I am importing each variable into my Makefile manually like this:
var1=$$(grep '^var1=' .env | cut -d= -f2-)
This feels clumsy and prone to bugs when adding more variables.
I have also tried adding an extra target to the Makefile to read each line of .env and pass it to export, but values exported in one target are not available to others.
I expect there is a built in feature for doing this in make, but I have not been able to find documentation for it.
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On the Projects page, select the project that you want to import environment variables to, and click Properties to open the Project Properties window. On the General page, click Environment. In the Environment Variables dialog, click Import from File.
If you've not exported the environment variable, it is not accessible until you do export it, or unless you pass it explicitly on the command line: make DEMOPATH="${demoPath}" … If you are using a C shell derivative, substitute setenv demoPath /usr/local/demo for the export command.
You can create an. env file in the application's root directory that contains key/value pairs defining the project's required environment variables.
The .env file feature only works when you use the docker-compose up command and does not work with docker stack deploy . Both $VARIABLE and ${VARIABLE} syntax are supported.
Assuming your include file is comprised entirely of valid make assignments then the include directive is likely what you want here.
The include directive tells make to suspend reading the current makefile and read one or more other makefiles before continuing. The directive is a line in the makefile that looks like this:
include filenames…filenames can contain shell file name patterns.
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