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I'd like to validate my hand-written makefiles, to make sure they work as intended on a variety of platforms. Is there a utility I can use to warn me of idiosyncrasies that might get in the way?
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$$ means be interpreted as a $ by the shell. the $(UNZIP_PATH) gets expanded by make before being interpreted by the shell.
Also you can just type make if your file name is makefile/Makefile . Suppose you have two files named makefile and Makefile in the same directory then makefile is executed if make alone is given. You can even pass arguments to makefile.
@enchanter You can use echo, but you would need to put it outside the foreach loop, like this: @echo -e $(foreach var,$(. VARIABLES),"$(var)=$($(var))\n") . $(foreach...) concatenates all of the values from the loop, and then executes the result.
Not as far as I'm aware of.
The best thing to do is respect the old rule "port early; port often". Try building your application on other platforms as soon as possible, and re-do it whenever you have the opportunity. That'll shake out portability bugs in your code, and validate the Makefile as a side-effect.
That said, it's wise to limit yourself to conservative Makefile features as much as possible. You might want to look at the POSIX make manpage (though I'd advise you to use the %.foo: %.bar rules rather the nominally standard .bar.foo: rules), and the portable make programming section of the autoconf manual is full of good advice.
Oh, and you know that autoconf is a Good Thing, yes?
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