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New posts in x86

When can the CPU ignore the LOCK prefix and use cache coherency?

multithreading caching concurrency x86 cpu

Startup of Winforms program 10x slower under x64 relative to x86

c# winforms performance x86 64-bit

How do I force gcc to call a function directly in PIC code?

c gcc x86 position-independent-code plt

Are RMW instructions considered harmful on modern x86?

assembly optimization x86 intel

Does `xchg` encompass `mfence` assuming no non-temporal instructions?

multithreading assembly x86 intel memory-barriers

Why wasn't MASKMOVDQU extended to 256-bit and 512-bit stores?

caching x86 intel cpu-architecture

Why does using MFENCE with store instruction block prefetching in L1 cache?

performance x86 intel memory-barriers prefetch

32-byte aligned routine does not fit the uops cache

performance assembly x86 intel cpu-architecture

Is the address checked by the memory alignment check mechanism a effective address, a linear address or a physical address?

assembly x86 memory-alignment osdev memory-segmentation

x86: ZF not always updated by AND?

assembly x86

What would happen if the CS segment register is changed? (And how would you do so?)

assembly x86 x86-16 memory-segmentation

Linux kernel header.S source, why _end+3 needed when zeroing BSS?

linux assembly linux-kernel x86 bootloader

Why does an assembly program only work when linked with crt1.o crti.o and crtn.o?

assembly linker x86 32-bit

SIMD minmag and maxmag

assembly floating-point x86 sse avx

What are the consequences of changing a symbol from .globl to .weak?

c linux assembly linux-kernel x86

Transition from real to protected mode in the Linux kernel

assembly linux-kernel x86 real-mode protected-mode

reinterpret int32 to float

c++ x86 nan reinterpret-cast

C++ code execution time varies with small source change that shouldn't introduce any extra work

c++ performance visual-c++ x86 benchmarking

BIOS and Address 0x07C00

x86 operating-system intel bios osdev

How "lock add" is implemented on x86 processors

c++ assembly x86 atomic cpu-architecture
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