Logo Questions Linux Laravel Mysql Ubuntu Git Menu
HTML CSS JAVASCRIPT SQL PYTHON PHP BOOTSTRAP JAVA JQUERY R React Kotlin
 

New posts in x86

In which condition DCU prefetcher start prefetching?

x86 intel cpu-architecture cpu-cache prefetch

sys_execve system call from Assembly

linux assembly x86 system-calls

What does alignment to 16-byte boundary mean in x86

optimization x86 memory-alignment

What is an assembly-level representation of pushl/popl %esp?

assembly x86 stack-memory instruction-set stack-pointer

Why does switching from AT&T to Intel syntax make this tutorial segfault using GAS?

assembly x86 intel gnu-assembler att

Is it possible to run 16 bit code in an operating system that supports Intel IA-32e mode?

x86 kernel x86-64 cpu

How can you insert a NaN into a xmm register?

assembly x86 nan sse

Online Assembly language resources [closed]

visual-c++ assembly x86

How does this piece of assembly work?

assembly x86

Calling LoadLibrary on a 64-bit dll from a 32-bit process

c++ x86 64-bit loadlibrary

Layout of structs in Linux/x86-64 syscalls for assembly programmers?

c linux linux-kernel x86 x86-64

Branch prediction and branch target prediction optimization

c++ c optimization x86 branch-prediction

Why do we "PUSH EBP" and "MOV EBP, ESP" in the CALLEE in Assembly?

assembly x86 x86-64 cpu-registers

Why Enable/Disable A20 Line

memory x86 operating-system bios osdev

How is machine code stored in the EXE file?

x86 portable-executable machine-code instruction-set opcode

Assembly commands LEA/LDS/LES [duplicate]

assembly x86 command

Why enable A20 line in Protected Mode?

linux assembly linux-kernel x86 operating-system

In assembly, what does `PTR` stand for?

assembly x86

Are there any modern CPUs where a cached byte store is actually slower than a word store?

performance x86 arm cpu-architecture cpu-cache

Why can't I get the value of asm registers in C?

c gcc x86 inline-assembly cpu-registers
« Newer Entries Older Entries »