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New posts in cpu-architecture
Can the status register influence data storage in a CPU?
Mar 05, 2026
assembly
x86
cpu-architecture
cpu-registers
eflags
How MATLAB makes the distinction between P-Cores and E-Cores?
Mar 06, 2026
matlab
cpu-architecture
cpu-cores
Reordering commands using super-pipeline CPU
Mar 04, 2026
assembly
x86
pipeline
cpu
cpu-architecture
Why does a busy loop take 100% of the CPU?
Mar 04, 2026
cpu-usage
cpu-architecture
busy-loop
Loop stride and cache line
Mar 01, 2026
arrays
caching
cpu-architecture
cpu-cache
How do I see how many slices are in the last level cache?
Feb 28, 2026
caching
x86
intel
cpu-architecture
cpu-cache
When exactly is the MMU accessed on x86?
Mar 01, 2026
memory-management
x86
cpu-architecture
virtual-memory
mmu
Detecting the CPU architecture of specific process in C#
Mar 01, 2026
c#
.net
process
detect
cpu-architecture
Calculating execution time for 2-threaded CPUs?
Feb 27, 2026
multithreading
operating-system
cpu-architecture
Why do longer pipelines make a single delay slot insufficient?
Feb 26, 2026
cpu-architecture
How is a critical path formed when there is a data dependency between a loop iterations while a CPU executing instructions?
Feb 26, 2026
performance
assembly
x86-64
cpu-architecture
micro-optimization
What causes kernel memory operations in perf stats for an userspace-only process?
Feb 25, 2026
c++
performance
x86
cpu-architecture
perf
Load/stores per cycle for recent CPU architecture generations
Feb 25, 2026
performance
x86
cpu
cpu-architecture
memory-bandwidth
What happens to the cache-lines for a page when the page is swapped out to the disk?
Feb 24, 2026
caching
operating-system
paging
cpu-architecture
MSI: Why do we need to write the line back when other CPU is going to override it?
Feb 22, 2026
cpu-architecture
cpu-cache
Does INVLPG instruction or mprotect() affect the CPU cache state while invalidating TLB entries?
Feb 22, 2026
assembly
x86
cpu-architecture
cpu-cache
tlb
Memory latency measurement with time stamp counter
Feb 20, 2026
c
performance
x86
cpu-architecture
tsc
How to tell if a number is exactly representable as a 32-bit IEEE float?
Feb 20, 2026
floating-point
binary
bit
cpu-architecture
ieee-754
CPU Cache implementation in C or C++ or SystemC
Feb 19, 2026
c++
c
hardware
modeling
cpu-architecture
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