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New posts in assembly

How to embed LLVM assembly or intrinsics in C program with Clang?

assembly llvm clang embedding

Vectorizing with unaligned buffers: using VMASKMOVPS: generating a mask from a misalignment count? Or not using that insn at all

gcc assembly x86 sse avx

Why does GCC drop the frame pointer on 64-bit?

gcc assembly x86 64-bit stack-frame

Does Java strictfp modifier have any effect on modern CPUs?

java assembly sse expression-evaluation strictfp

How to produce a minimal BIOS hello world boot sector with GCC that works from a USB stick on real hardware?

assembly x86 qemu gnu-assembler bare-metal

Why can't GCC assume that std::vector::size won't change in this loop?

c++ gcc assembly

GCC 4.4: Avoid range check on switch/case statement in gcc?

c assembly switch-statement x86-64 gcc4.4 intel

how multicore processors boot?

assembly multicore boot hardware-interface

Fast sine/cosine for ARMv7+NEON: looking for testers…

performance assembly arm iphone-3gs neon

Improving field get and set performance with ASM or Javassist

java assembly java-bytecode-asm

Which 2's complement integer operations can be used without zeroing high bits in the inputs, if only the low part of the result is wanted?

assembly binary x86 integer twos-complement

Why does this difference in asm matter for performance (in an un-optimized ptr++ vs. ++ptr loop)?

c++ performance loops assembly x86

Why is typeA == typeB slower than typeA == typeof(TypeB)?

c# .net assembly x86-64

Developing Android apps using assembly language

android assembly

Running 32 bit assembly code on a 64 bit Linux & 64 bit Processor : Explain the anomaly

linux assembly gdb x86 x86-64

Are there any good, modern, online guides to hand optimizing assembly code? [closed]

optimization assembly

LLVM assembly: assign integer constant to register

assembly integer constants llvm

What is the difference between assembly on mac and assembly on linux?

macos gcc assembly x86 x86-64

What is the stack engine in the Sandybridge microarchitecture?

assembly x86 intel cpu-architecture

Understanding the impact of lfence on a loop with two long dependency chains, for increasing lengths

performance assembly x86 cpu-architecture perf
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