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In makefiles what do CC (compiler) and LD (linker) stand for?
C in CC is probably compiler, what is the other C? And L in LD is probably linker, what does the D stand for?
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Here's a quick and dirty intro : Files. All you need is a file called "makefile" or "Makefile". Comments Pound signs ("#") are comments to end of line. Variables CC = gcc.
cc command is stands for C Compiler, usually an alias command to gcc or clang. As the name suggests, executing the cc command will usually call the gcc on Linux systems. It is used to compile the C language codes and create executables.
CFLAGS and CXXFLAGS are either the name of environment variables or of Makefile variables that can be set to specify additional switches to be passed to a compiler in the process of building computer software.
Names of these variables originate from names of the corresponding tools. Usually the meaning of these abbreviations is the following:
CC stands for "C compiler" (in GCC abbreviation it is also treated as "compiler collection").LD is a linker (comes from "link editor" or from "loader").These are also commonly used in makefiles (see Implicit variables chapter of GNU Make manual):
CPP stands for "C preprocessor"CXX is a C++ compilerAS is an assembly language compilerAR is an archive-maintaining program
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