how to make 'make' append additional standard FLAGS

Question

i have a Makefile (that is not really under my control and) that defines a number of variables used by implicit rules:

CPPFLAGS := $(CPPFLAGS) -I../../../../modules
CXXFLAGS += -std=c++11

now, I want to add some additional flags to these variables as make variables. Something like:

 make CPPFLAGS="-D_FORTIFY_SOURCE=2" CXXFLAGS="-g -O2"

unfortunately this results in overwriting the entire CPPFLAGS/CXXLAGS defined in the Makefile, whereas I would like to accumulate them (actually I would like to append the externally set flags, even though the above code clearly tries to prepend)

For whatever reasons, specifying these variables as environment variables (instead of make variables) works:

 CPPFLAGS="-D_FORTIFY_SOURCE=2" CXXFLAGS="-g -O2" make

now for external reasons, i'm having a hard time passing those flags via envvars (and instead need make vars).

So what is the proper way to add compiler flags used by implicit rules? Both overwriting and accumulating variables strike me as a common task for Makefiles; there must be some way to do this...I've searched the make documentation but haven't found anything!

A simplistic approach is obviously to introduce some helper variable:

 CXXFLAGS = -std=c++11 $(EXTRA_CXXFLAGS)

and then set this helper variable from outside:

 make EXTRA_CXXFLAGS="-g -O2"

But: is there a standard name for such helper variable? (If so, which one? where is that documented??) Even better, is there an other variable that is automatically added to implicit rules (so i don't have to manually append the FLAGS?)

What is the reason why both variants for accumulating variables in my original Makefile work only with envvars, and not with make vars?

Answer 1

Environment variables can be modified within makefile using normal assignments. And it is common to set variables like CFLAGS, CXXFLAGS which can be appended (or modified in some way) in makefile, in the environment:

CPPFLAGS="-D_FORTIFY_SOURCE=2" CXXFLAGS="-g -O2" make

As opposite, variables set in make command line, cannot be modified within makefile using normal assignments. Such way you can set variables which used as some switch within makefile:

make V=1

Example of Makefile:

V=0 # Will be overriden by variable set in `make` command line
ifneq ($(V),0)
# output some debug information
endif

The only way to override variable set in command line is using override directive:

override CPPFLAGS := $(CPPFLAGS) -I../../../../modules # Will append string to variable, even if it set by command line

override CXXFLAGS += -std=c++11 # Similar but in the simpler form

---

Modifying CXXFLAGS and other *FLAGS variables

Suppose concrete makefile allows user to affect flags (that is, it doesn't hardcode them using direct assignment such CXXFLAGS := -g). And you want to affect on the flags.

1. Normal way is to set environment variable which will prepend flags set in the makefile itself. These additional flags, set by the makefile, are needed for correct compilation and linking.

2. However, you can try to override whole flags using variable set in the command line. In that case nobody garantees you don't suddenly broke the compilation, but it may work.

3. As for appending flags.. Well, it is normally needed for overwrite flags set by makefile (otherwise prepending flags using environment variable is sufficient). Because of that, any garantees will be vanished again. So, why do not use the previos way (setting whole flags via command line variable assignment)? At least, if something will go wrong, you will definitely know that problem is with you flags, not with ones set by makefile.