I've been researching about interrupts on the x86 and how a kernel handles the various interrupts using interrupt handlers. But one thing confuses me though.
I know that interrupts could be hardware-generated, such as disk and timer interrupts, or they could be CPU exceptions such as page faults, divide by zero exceptions etc. What confuses me is that some int codes are used for handling both (INT 08 - 0F in particular). For example, Ralf Brown's list says that the INT 09h interrupt doubles as both the KEYBOARD DATA READY
hardware interrupt and the COPROCESSOR SEGMENT OVERRUN
exception.
So my question is, given interrupts like these, how does an interrupt handler know which interrupt to handle?
x86 generally does not provide a way to distinguish between hardware and software interrupts. The exception handler must query external hardware or other means to disambiguate the two cases.
To avoid chaos, systems can prevent overloading the same vector by setting the privilege level in the corresponding interrupt descriptor table entry. A user-mode (CPL=3) INT instruction cannot generate a software exception on a privileged vector.
For a few exceptions, the processor pushes an additional Error Code word on the exception stack frame. The Error Code field has a bit 'EXT' to indicate if the exception is caused by an external interrupt. In the IA manual volume 3, section 6.13 states:
EXT External event (bit 0) — When set, indicates that the exception occurred during delivery of an event external to the program, such as an interrupt or an earlier exception.
However, only a few exception push the eror code field, and all of these are processor exceptions below vector 32.
-- EDIT --
Another bit: Don't be fooled by "Trap Gates" and "Interrupt Gates". Interrupts can go through trap gates and INT's can go through interrupt gates. The only difference is treatment of the interrupt enable state on entry to the handler function.
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