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How to dynamically reverse the bit position in verilog?

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verilog

wire [9:0] data_reg;
reg [3:0] Reverse_Count = 8;  //This register is derived in logic and I need to use it in following logic in order to reverse the bit position. 
assign data_reg[9:0] = 10'h88;  // Data Register

genvar i;
for (i=0; i< Reverse_Count; i=i+1) 
   assign IReg_swiz[i] = IReg[Reverse_Count - 1 -i];

This is generating syntax error. May I know how to do this in verilog

like image 917
Charuben Pandya Avatar asked Nov 08 '25 08:11

Charuben Pandya


1 Answers

If you'd have Reverse_Count as constant, your task boils down to just wire mix-up, which is essentially free in HDL. In your case, the task can be nicely reduced to first mirroring wide data and then shifting by Reverse_Count to get LBS bit on its position, which itself is done just by a row of N-to-1 multiplexers.

integer i;
reg  [9:0] reversed;
wire [9:0] result;

// mirror bits in wide 10-bit value    
always @*
for(i=0;i<10;i=i+1)
    reversed[i] = data_reg[9-i];

// settle LSB on its place
assign result = reversed>>(10-Reverse_Count);
like image 146
lvd Avatar answered Nov 10 '25 19:11

lvd



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