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talking in very low level, how the cores are initialized ?
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A multicore processor is an integrated circuit that has two or more processor cores attached for enhanced performance and reduced power consumption. These processors also enable more efficient simultaneous processing of multiple tasks, such as with parallel processing and multithreading.
Core Settings In Windows 10Type 'msconfig' into the Windows Search Box and hit Enter. Select the Boot tab and then Advanced options. Check the box next to Number of processors and select the number of cores you want to use (probably 1, if you are having compatibility issues) from the menu. Select OK and then Apply.
From the System Utilities screen, select System Configuration > BIOS/Platform Configuration (RBSU) > System Options > Processor Options > Processor Core Disable and press Enter. Enter the number of cores to enable per processor socket and press Enter. If you enter an incorrect value, all cores are enabled.
Should I Enable All Cores? Your operating system and the programs you're running will use as many cores and processing power as they need. So, there's really no need to enable all the cores. For example, Windows 10 is configured to automatically use all the cores if the program you're running has this ability.
you can check out all the gory details in the Intel specification. The gory details are in chapter 8.1.
Here is an excerpt:
Following power-up or an assertion of the RESET# pin, each processor on the system bus performs a hardware initialization of the processor (known as a hardware reset) and an optional built-in self-test (BIST). [snip] At this point, the action taken depends on the processor family:
• P6 family processors—All the processors on the system bus (including a single processor in a uniprocessor system) execute the multiple processor (MP) initialization protocol across the APIC bus. The processor that is selected through this protocol as the bootstrap processor (BSP) then immediately starts executing software-initialization code in the current code segment beginning at the offset in the EIP register.
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