Something that has always confused me is how 8-bit computers access more than 256 bytes of RAM. I know that it must use two registers, but can any one show me an example of what this would look like in assembly code?
Like:
mov a, [x] ???
Design an 8-bit computer architecture with a 192 total bytes of memory (128 bytes of instruction memory + 64 bytes of data memory) and 8 total one-byte registers (4 architecture specific registers and 4 general registers).
Detailed Solution. One memory location of an 8-bit microcontroller external RAM will store 8 bits of data or 1 byte. Hence, the number of bytes the memory locations from 8000 H to 9FFF H can store is equal to 2000 H or 8192. So option (2) is the correct answer.
Let's imagine we have LOWER and HIGHER 8bit half of the address in registers L and H. For example, we want to read byte from address 32770 dec = 8002 hex.
mov l, 02h ;lower byte of address
mov h, 80h ;higher byte of address
mov a, [hl] ;a <-- [h*256 + l]
Many addressing modes exist in CPUs. So we can have a different example, e.g. with just a single register and an immediate address:
mov h, 80h
mov a, [2] ;a <-- [h*256 + immediate]
It always depends on a particular CPU architecture. For example Zilog Z80 is called 8-bit CPU but it also contains many 16-bit instructions. You can do indexed addressing on it like this:
mov ix, 8002h ;base address of an array
mov a,[ix+20] ;a <-- [ix + 20] i.e. read a byte from an array like ix[20] in C
Note: Those old 8-bit CPU's use an 8-bit accumulator, i.e. they can compute math and other arithmetic stuff only in an 8-bit register, so they are 8-bit on a software computation level. And their memory accessing unit is 8-bit, i.e. it can read or write just a single byte of memory at a time, so they are 8-bit on hardware level too. Those 16-bit instructions are slow, they actually do a pair of 8-bit operations in succession.
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