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How clear and invalidate ARM v7 processor cache from User Mode on Linux 2.6.35

Tags:

linux

arm

I tried clear and invalidate ARM v7 processor cache for instruction line, because instruction codes can change in execution.

For reaching the effect, I tried 2 variants. Here they are:

  1. I used GCC __clear_cache() function but it didn't give a required result. Instruction codes in cache didn't change.

  2. I looked for a source codes for GCC and found the uclinux-eabi.h file where I found the next code for clearing cache:

    /* Clear the instruction cache from `beg' to `end'.  This makes an
       inline system call to SYS_cacheflush.  */
    #undef CLEAR_INSN_CACHE
    #define CLEAR_INSN_CACHE(BEG, END)                                    \
    {                                                                     \
        register unsigned long _beg __asm ("a1") = (unsigned long) (BEG); \
        register unsigned long _end __asm ("a2") = (unsigned long) (END); \
        register unsigned long _flg __asm ("a3") = 0;                     \
        register unsigned long _scno __asm ("r7") = 0xf0002;              \
        __asm __volatile                                                  \
        (                                                                 \
            "swi 0x0    @ sys_cacheflush"                                 \
            : "=r" (_beg)                                                 \
            : "0" (_beg), "r" (_end), "r" (_flg), "r" (_scno));           \
    }
    

This variant didn't give the result too.

Maybe someone knows what I do wrong ?

like image 570
Alex Kolesnyk Avatar asked May 18 '11 14:05

Alex Kolesnyk


1 Answers

I had a similar problem myself. __clear_cache() works, but only if the memory area in question was allocated using mmap() with PROT_EXEC set. Linux will not flush the instruction cache if you provide it with a memory range that comes from regular malloc()ed memory, even if the processor seems to be happy to execute code from malloc()ed memory.

See https://community.arm.com/groups/processors/blog/2010/02/17/caches-and-self-modifying-code for example code on how to do this.

like image 162
Rune Avatar answered Oct 16 '22 11:10

Rune