I have a huge source code that works on PowerPC. I need to port it to ARM. But, ARM generates h/w exception on unaligned memory accesses. So, I want to find all the possible instances where the unaligned memory access exception could occur. I've considered the following options.
My questions are,
Unaligned memory accesses occur when you try to read N bytes of data starting from an address that is not evenly divisible by N (i.e. addr % N != 0). For example, reading 4 bytes of data from address 0x10004 is fine, but reading 4 bytes of data from address 0x10005 would be an unaligned memory access.
ARM processors do not provide support for unaligned doubleword accesses, for example unaligned accesses to long long integers. Doubleword accesses must be either eight-byte or four-byte aligned. The compiler does not provide support for modulo eight-byte alignment checking.
An unaligned address is then an address that isn't a multiple of the transfer size. The meaning in AXI4 would be the same.
Unaligned memory access is the access of data with a size of N number of bytes from an address that is not evenly divisible by the number of bytes N. If the address is evenly divisible by N, we have aligned memory access.
It depends on your POWERPC processor. High end server processors like POWER8 will almost never generate alignment exceptions. That being said, often there is a HID SPR bit to make alignment exceptions occur more often. Either way, under Linux, the kernel will handle them and the user won't see it, other than a performance loss. You can set the prctl(PR_UNALIGN_SIGBUS) and this will make the kernel generate a SIGBUS, rather than handle them.
In linux with perf events you can use the alignment-faults events. eg "perf stat -e alignment-faults testcase". Also if you turn on CONFIG_PPC_EMULATED_STATS you will get a debugfs entry called "emulated_instructions" which has a entry for unaligned accesses.
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