I am currently writing simple tests to understand how gdb compiles from C++ to asm using extern "C"
and option -O0
and my asm object is compiled with nasm -g -f elf64
Here is my disassembled concerned stack frame:
0x0000000000400570 <+0>: push rbp
0x0000000000400571 <+1>: mov rbp,rsp
0x0000000000400574 <+4>: push r10
=> 0x0000000000400576 <+6>: mov r10,QWORD PTR [rbp-0x8]
0x000000000040057a <+10>: pop r10
0x000000000040057c <+12>: mov rsp,rbp
0x000000000040057f <+15>: pop rbp
0x0000000000400580 <+16>: ret
0x0000000000400581 <+17>: nop WORD PTR cs:[rax+rax*1+0x0] ; this instruction
0x000000000040058b <+27>: nop DWORD PTR [rax+rax*1+0x0] ; and this one
The two last instructions are padded with nop
, I can get this because of alignment.
Now my question is why nop
are being along WORD PTR cs:[rax+rax*1+0x0]
and DWORD PTR [rax+rax*1+0x0]
?
Those are multi-byte nop instructions, used as padding for alignment purposes. In this case they won't ever be executed, so the compiler could have used anything but under other circumstances it may need to be executable. See also the intel optimization manual, section 3.5.1.9 Using NOPs, as well as the instruction set reference entry for NOP
, of course.
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