I work with a Makefile generated by an external tool (Netbeans), where I can not change the logic of the main target, but I am able to "inject" logic in a target that is executed before the actual build (.build-pre to be specific in Netbeans-generated Makefile)
I would like for that target to conditionally terminate the make execution, but without raising an error. If I do
exit
inside the "pre" rule, nothing happens (I mean, the rule terminates, but make continues). If I add
exit 1
make will terminate, but it will return an error status.
Is there a way to force make to exit in a clean way? I searched for make functions, but found only error/warn/info, but nothing like exit.
Thanks in advance!
EDIT: Based on comments it does not seem possible. Pity.
For completeness, a more specific example of what I'd like to achieve:
default: pre @echo "Doing default" pre: @echo "Doing pre" ifeq "$(SOME_VARIABLE)" "yes" exit 0 fi
With Makefile like above, I'd like to be able for pre to execute, and conditionally prevent 'default' from executing, but still return 0 to the shell.
To ignore errors in a recipe line, write a ' - ' at the beginning of the line's text (after the initial tab). The ' - ' is discarded before the line is passed to the shell for execution.
Answers 1 : of Makefile: exit on conditional run: { [ -z "$(MY_APP)" ] && echo "MY_APP must be set" && false } || true ... # Or just if-Then-Else if [ -z "${MY_APP}" ] ; then echo "MY_APP must be set" ; false ; fi ...
A simple makefile consists of “rules” with the following shape: target … : prerequisites … recipe … … A target is usually the name of a file that is generated by a program; examples of targets are executable or object files. A target can also be the name of an action to carry out, such as ' clean ' (see Phony Targets).
You can have the all target do nothing if a variable is not set:
ifeq ($(SOME_VAR),) $(info SOME_VAR not set!) all: else all: target1 target2 targetetc endif
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