Difference between 'wait' and '@' statement

Question

The following set of codes do the same thing.Is there any difference between them ?If not , why is wait (clk) not generally used?

always @(posedge clk)
begin

end


always wait(clk)
begin 

end

Answer 1

@(posedge clk) is edge sensitive , hence it is used to model synchronous circuits.While, wait(clk) is level sensitive.Since most circuits are designed to be synchronous @(posedge clk) is predominantly used

wait (expression)

The "expression" is evaluated, if false, then execution is suspended until the expression becomes true. If the expression is true when the statement is reached, then the wait has no effect, and execution proceeds to the controlled statement.

@(posedge clk) - is an edge event.
posedge:0,x,z->1    negedge:1,x,z->0

Edge events are useful for modelling clocked logic elements, like flip-flops. They are also useful for synchronizing activity in a model based on a common clock. Example, in the following always block,it enters the always block on the negative edge of clock.

always @(negedge clock)
    x = f(y);