Difference Between Page Table and Page Directory

Question

I have been hearing the term address space often in microprocessors and microcontrollers Paradigm. I understand that an address is used to refer to a particular block of memory in the physical memory(Primary).

If I'm right and address space is the super set of all such addresses. Right?

By using virtual memory/paging we are extending the address space using secondary storage.

In this paradigm what exactly is a page table, page table entry and page directory? I understand that first p.memory is segmented logically and these segments are divided into pages. So what exactly is a page table? A table containing Pages? And what is a page directory a super table of Page Tables?

Answer 1

In the x86 architecture, page directories and page tables together provide the mapping between virtual addresses (memory addresses used by applications) and physical addresses (actual locations in the physical memory hardware).

A page is simply a contiguous chunk of memory. x86 (32-bit) supports 3 sizes of pages: 4MB, 2MB, and 4KB, with the latter being the most commonly used in mainstream operating systems. A page table is an array of 1024 * 32-bit entries (conveniently fitting into a single 4KB page). Each entry points to the physical address of a page. Because a single page table is not able to represent the entire address space on its own (1024 entries * 4KB = only 22-bits of address space), we require a second level page table: a page directory. A page directory also consists of 1024 * 32-bit entries (again fitting into a single page), each pointing to a page table. We can see that now 1024 * 1024 * 4KB = 32-bits and with this 3-level structure we are able to map the entire 4GB virtual address space.

When the CPU is asked to access a virtual address, it uses the 10 highest order bits (31:22) to index into the page directory table (the base address of which is stored in a special register). The next 10 highest order bits (21:12) are used to index into the page table pointed to by the page directory entry. The lowest 12 order bits (11:0) are finally used to index a byte in the page pointed to by the page table entry.

In other systems there may be more or fewer levels of page table required, depending on the size of the virtual address space and the page sizes supported. For example, x86 with 4MB pages only needs a single page directory. In 64-bit mode with 4KB pages, a 4-level system is used: a page mapping level 4 table contains entries that point to one of many page directories.

The Intel Architectures Developer's Manual has much more information about the topic, particularly in chapters 3 and 4.