I'm having some trouble with a C Makefile.
Here are the contents of the Makefile:
PROJECT = 3D-ELM
MPICC = mpicc
CLAGS = -g -O3
LIBS = -lm
SRC = src_el
OBJECTS = $(PROJECT).o
$(PROJECT).exe : $(OBJECTS)
$(MPICC) $(CFLAGS) $(LIBS) $(OBJECTS) -o $(PROJECT).exe
$(PROJECT).o : $(SRC)/$(PROJECT).c
$(MPICC) $(CFLAGS) $(LIBS) -c $(SRC)/$(PROJECT).c
clean:
rm -rf *o $(PROJECT)
When I make, here is the error:
gcc: -lm: linker input file unused because linking not done
Does anyone know what's wrong?
Many thanks in advance,
EDIT: Got it. I don't need to pass libs when making the object file... Doh! bangs head off desk
Thanks for all your help guys,
The problem comes from this part of the makefile:
$(PROJECT).o : $(SRC)/$(PROJECT).c
$(MPICC) $(CFLAGS) $(LIBS) -c $(SRC)/$(PROJECT).c
At this step you are only invoking the compiler. The -c
switch tells the compiler only to compile to an object file, and the linker is not involved at all. Since there is nothing to link, the $(LIBS)
part is unnecessary.
The actual linking is done at the following stage:
$(PROJECT).exe : $(OBJECTS)
$(MPICC) $(CFLAGS) $(LIBS) $(OBJECTS) -o $(PROJECT).exe
This is where the individual object files are merged together with the libraries to produce an executable. The compiler itself is not invoked at this point because the source files have already been transformed into object files.
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