ARM Memory Remapping

Question

ARM Page Table entry has TEX remap bits. I have read something like TEX remap is used along with the AP bits of the page table entry for access protection.

1. Someone help me clarifying what are these bits and What they signify
   

2. Is it somewhere related to memory remapping?
   

   a. If so in what ways is it related to the Normal Memory Remap Register and Primary Memory Remap Register.

3. Is linux kernel making use of these.

   a. If so in which way linux kernel uses these. Kindly give me some usecases.

Answer 1

In a nutshell, the TEX bits in the page table are Type EXtension bits. They can be used to control caching of the pages at a fine grained level, but is usually used as a pure software context which the HW ignores.

See:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0211k/Babgahdc.html

Linux uses these bits as software context for various memory management features:

#define PMD_SECT_MINICACHE     (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
#define PMD_SECT_WBWA          (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2))

See: http://lxr.free-electrons.com/source/arch/arm/include/asm/pgtable