Are addresses in x86 assembly virtual or physical?

Question

Suppose we have some x86 instruction like

mov eax, [ebx]

and the value of [ebx] is some address 0x123456789.

Does this address 0x123456789 refer to a virtual or physical address?

If virtual, will this be in the process virtual address space of the executing process, or the kernel virtual address space?

Reading What Every Programmer Should Know About Memory, it states that "A virtual address space is implemented by the Memory Management Unit (MMU) of the CPU".

So is there a CPU virtual address space independent of the operating system? Why would this be needed in addition to the kernel virtual address space? How would the CPU even perform a virtual to physical translation without an operating system?

Answer 1

In the x86 architecture you can't tell a physical address from a virtual address by just looking at the address value.

In your example¹, 0x123456789 is just an address.
If paging is enabled then every memory access performed by the program uses a virtual address.
If paging is not enabled then the address used is physical².

However since all major OSes uses paging, every program uses virtual addresses.

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So is there a CPU virtual address space independent of the operating system?

The CPU is a general purpose chip, it just offers features to the running software.
The OS can use them or not, the CPU won't give any use any special meaning.

It's like asking if the a postal system is independent of the senders/recipients.
Yes, it is independent in the sense that it doesn't particularly care about whom mails whom but it is the senders/recipients that make the system useful/alive.
So it is the OS that uses the translation feature offered by the CPU, anyway it wants.

Why would this be needed in addition to the kernel virtual address space?

I don't know what is a "kernel virtual address space" in this context but in general an OS cannot track all memory accesses performed by a program.
So it need hardware support (read: a specific CPU feature. read: paging) to translate their accesses.

How would the CPU even perform a virtual to physical translation without an operating system?

The same way it would perform an addition, an IO or any other operation: it fetches instructions, execute them and change its states (including the translation map from virtual to physical) based on their result/behavior.

Being these instructions the result of the compilation of an OS kernel, a JTAG debugger or cosmic rays heavy rain, little matters.

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¹ In your example is EBX that must be 0x123456789.

² Note that a virtual address can be a logical address (selector:offset) or a linear address (after being transformed). Without paging the term "physical address" is not actually used, instead an address is simply logical (segment:offset) or linear. In the context above "physical" means "won't undergo an MMU translation".

Answer 2

You are describing the chicken and egg problem of memory translation. This problem only occurs in page table translation.

When you execute a user-mode assembly instruction you are always using logical addresses.

Behind the scene your logical address needs to be translated into physical address. That is done using a page table. The operating system defines the tables that do the mapping. There will be system registers loaded with your process that tell where those page tables are located.

Are the address of the page tables physical or logical/virtual?

If they are virtual, a large page table can be paged out to secondary storage. But then you get the chicken and egg problem I mentioned above. If the page table is virtual how do the page tables get virtual/logical addresses?

That problem is handled in many system specific ways. The simplest is for the processor to define two page tables; one for the system space and one for the user space. The system page tables are always physical addresses. The user page tables are virtual (logical) addresses that use the system page table to map themselves to physical addreses.

"A virtual address space is implemented by the Memory Management Unit (MMU) of the CPU".

That is not precise and is misleading. the MMU translates LOGICAL addresses to PHYSiCAL addresses and raises exceptions when it is unable to do so.

The OPERATING SYSTEM implements the virtual address space. If the MMU cannot translate a logical address it raises an exception. The OS exception handler must determine if the memory access can be handled virtually by loading data from secondary storage.

So is there a CPU virtual address space independent of the operating system?

Virtual address spaces cannot exist without an operating system.

How would the CPU even perform a virtual to physical translation without an operating system?

The CPU (MMU) does not to virtual translation. It does logical to physical translation.