I'm trying to write a super simple Makefile
to run the tests in a Go project. The project's dependencies are vendored, but I want to skip these tests. When running this from the command line I simply do
$ go test $(go list ./... | grep -v /vendor/)
Yet, when I put this into a Makefile
like this:
test:
go test $(go list ./... | grep -v /vendor/)
.PHONY: test
the expression will not be evaluated:
$ make
go test
? github.com/m90/some-repo [no test files]
How do I get make to interpolate the expression in a shell-like manner?
In a Makefile recipe section you will need to escape the $
using a second $
:
test:
go test $$(go list ./... | grep -v /vendor/)
.PHONY: test
Depending on the circumstance, it might be more useful to evaluate the command during the expansion of the recipe using shell function:
test:
go test $(shell go list ./... | grep -v /vendor/)
.PHONY: test
This will make the package names part of the recipe, and will normally print the result of the subcommand when executed.
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