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Why doesn't my Makefile interpolate an expression in a command

Tags:

makefile

go

I'm trying to write a super simple Makefile to run the tests in a Go project. The project's dependencies are vendored, but I want to skip these tests. When running this from the command line I simply do

$ go test $(go list ./... | grep -v /vendor/)

Yet, when I put this into a Makefile like this:

test:
    go test $(go list ./... | grep -v /vendor/)

.PHONY: test

the expression will not be evaluated:

$ make
go test 
?       github.com/m90/some-repo    [no test files]

How do I get make to interpolate the expression in a shell-like manner?

like image 376
m90 Avatar asked May 24 '17 19:05

m90


2 Answers

In a Makefile recipe section you will need to escape the $ using a second $:

test:
    go test $$(go list ./... | grep -v /vendor/)

.PHONY: test
like image 69
m90 Avatar answered Nov 13 '22 02:11

m90


Depending on the circumstance, it might be more useful to evaluate the command during the expansion of the recipe using shell function:

test:
    go test $(shell go list ./... | grep -v /vendor/)

.PHONY: test

This will make the package names part of the recipe, and will normally print the result of the subcommand when executed.

like image 27
eush77 Avatar answered Nov 13 '22 02:11

eush77