why are there multiple layers of caches

Question

Does anyone know why in most of todays processors there are several layers of caches. Like L1 L2 and L3. Why cant a processor do with one big L1 cache?

Isnt having multiple layers of cache increases the complexity of caching protocols?

Answer 1

Die size. L1 is usually on-die; there is not room for a large cache on-die. L2/3 gets its own die and can be bigger and processed differently.

Also speed; L1 is built with tradeoffs for maximum speed, while L2/3 doesn't have to be as aggressively sped up.

Also multi-core. Modern multi-core processors give each core its own L1 for speed, but they share some or all of the other caches for coherency.

That said, PA-RISC processors have been built with the "let's just make a big L1 cache" approach. They were expensive.

Answer 2

Why cant a processor do with one big L1 cache?

The larger your processor cache, the longer the latency. There are also practical and cost considerations, since larger caches occupy more physical space on a chip. After a certain size, you lose too much of the caching speedup to make it worth it to increase cache size further. Eventually, therefore, a large cache becomes undesirable.

Processor designs that still want a large cache can make a tradeoff by having multiple cache levels. You start with a small and fast cache, and gradually fall back to larger, slower caches on successive misses.