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Why 64 bit mode ( Long mode ) doesn't use segment registers?

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I'm a beginner level of student :) I'm studying about intel architecture, and I'm studying a memory management such as a segmentation and paging. I'm reading Intel's manual and it's pretty nice to understand intel's architectures.

However I'm still curious about something fundamental. Why in the 64bit long mode, all segment registers are going to bit 0? Why system doesn't use segment registers any longer?

Because system's 64bit of size (such as a GP registers) are enough to contain those logical address at once? Is protection working properly in 64bit mode?

I tried to find 64bit addressing but I couldn't find in Google. Perhaps I have terrible searching skill or I may need some specfied previous knowledge to searching in google.

Hence I'd like to know why 16bit of segment registers are not going to use in 64bit mode, and how could protection work properly in 64bit mode.

Thank you!

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Henrik Avatar asked Jan 16 '14 15:01

Henrik


People also ask

Why does x86-64 not support segmentation?

The x86-64 architecture does not use segmentation in long mode (64-bit mode). Four of the segment registers, CS, SS, DS, and ES, are forced to base address 0, and the limit to 264. The segment registers FS and GS can still have a nonzero base address.

Does a 64-bit processor have 64 registers?

A 64-bit processor uses internal registers -- temporary storage locations within the processor -- that are 64 bits wide. This typically corresponds to an address bus and data bus that are also 64 bits wide.

Are segment registers still used?

Segment registers still exist in the hardware, even on a modern 64-bit Skylake box, although operating systems use them for their own purposes, and won't let you use them like you could in the old days. (Try this in NetRun now!) The full set of x86 segment registers: cs: code segment.

How many registers does a 64-bit CPU have?

As well, 64-bit x86 includes SSE2, so each 64-bit x86 CPU has at least 8 registers (named XMM0–XMM7) that are 128 bits wide, but only accessible through SSE instructions.


1 Answers

In a manner of speaking, when you perform array ("indexed") type addressing with general registers, you are doing essentially the same thing as the segment registers. In the bad old days of 8-bit and 16-bit programming, many applications required much more data (and occasionally more code) than a 16-bit address could reach.

So many CPUs solved this by having a larger addressable memory space than the 16-bit addresses could reach, and made those regions of memory accessible by means of "segment registers" or similar. A program would set the address in a "segment register" to an address above the (65536 byte) 16-bit address space. Then when certain instructions were executed, they would add the instruction specified address to the appropriate (or specified) "segment register" to read data (or code) beyond the range of 16-bit addresses or 16-bit offsets.

However, the situation today is opposite!

How so? Today, a 64-bit CPU can address more than (not less than) all addressable memory space. Most 64-bit CPUs today can address something like 40-bits to 48-bits of physical memory. True, there is nothing to stop them from addressing a full 64-bit memory space, but they know nobody (but the NSA) can afford that much RAM, and besides, hanging that much RAM on the CPU bus would load it down with capacitance, and slow down ALL memory accesses outside the CPU chip.

Therefore, the current generation of mainstream CPUs can address 40-bits to 48-bits of memory space, which is more than 99.999% of the market would ever imagine reaching. Note that 32-bits is 4-gigabytes (which some people do exceed today by a factor of 2, 4, 8, 16), but even 40-bits can address 256 * 4GB == 1024GB == 1TB. While 64GB of RAM is reasonable today, and perhaps even 256GB in extreme cases, 1024GB just isn't necessary except for perhaps 0.001% of applications, and is unaffordable to boot.

And if you are in that 0.001% category, just buy one of the CPUs that address 48-bits of physical memory, and you're talking 256TB... which is currently impractical because it would load down the memory bus with vastly too much capacitance (maybe even to the point the memory bus would stop completely stop working).

The point is this. When your normal addressing modes with normal 64-bit registers can already address vastly more memory than your computer can contain, the conventional reason to add segment registers vanishes.

This doesn't mean people could not find useful purposes for segment registers in 64-bit CPUs. They could. Several possibilities are evident. However, with 64-bit general registers and 64-bit address space, there is nothing that general registers could not do that segment registers can. And general purpose registers have a great many purposes, which segment registers do not. Therefore, if anyone was planning to add more registers to a modern 64-bit CPU, they would add general purpose registers (which can do "anything") rather than add very limited purpose "segment registers".

And indeed they have. As you may have noticed, AMD and Intel keep adding more [sorta] general-purpose registers to the SIMD register-file, and AMD doubled the number of [truly] general purpose registers when they designed their 64-bit x86_64 CPUs (which Intel copied).

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honestann Avatar answered Sep 21 '22 11:09

honestann