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What makes SPI faster than I2C protocol [closed]

Tags:

c

embedded

i2c

spi

I know the basic of I2C and SPI communication. As both are synchronous protocol. I wanted to know that what makes SPI faster than I2C. If I am not wrong using I2C we can go used 400kbps while in SPI we can achieve 10mbps also. Does it because of hardware change? This question was asked to me in one of the interview.. Please make me correct if I am wrong.

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kapilddit Avatar asked Feb 18 '14 09:02

kapilddit


People also ask

Why is SPI faster than I2C?

SPI is superior in speed compared to I2C. Its push-pull drivers offer enhanced speed and signal integrity and its full-duplex support means master and slave devices can send data at the same time, allowing for even quicker data exchanges.

Is SPI protocol is faster than I2C protocol?

I2C is a two wire protocol and SPI is a four wire protocol. I2C supports clock stretching and SPI does not have clock stretching. I2C is slower than SPI.

What are the advantages of SPI over I2C communication interface?

SPI devices use push-pull drivers that offer superior speed and signal integrity when compared to the open drain lines employed in the I2C protocol. Additionally, SPI supports full-duplex communication where both the master and slave can send data at the same time via the MOSI and MISO lines.

How much faster is SPI than I2C?

Speed. I2C originally defined data transfer rates at 100kbps, though we have seen it bump up to 400kbps or even up to 5Mbps in Ultra Fast-mode. SPI, however, does not define a top—or any—communications speed, and can be implemented at speeds of 10 Mbps or more.


2 Answers

There is an important hardware difference which limits the speed on I2C.

SPI: all lines are driven by the transmitter both high and low. This minimizes the time required for the wire to change states.

I2C: all lines are open-collector which means that the transmitter only drives the line low. When the transmitter releases the line, a resistor connected to Vcc (supply voltage) pulls the light high. However, due to capacitance of the wire and the components, the wire goes to high voltage relatively slowly. Because of this, the clock speed must be reduced to allow time for the lines to "drift" high.

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DoxyLover Avatar answered Oct 12 '22 20:10

DoxyLover


I2C is quite involved, supporting multiple masters on the bus. Which causes significant overhead in the bus protocol, an ACK for every byte and intentional delays to arbitrate access to the bus. Also a set maximum bus rate, 100 kHz in the original spec, 400 kHz is common today, additional 10 kHz low-speed and 3.4 Mhz high-speed modes, the 2012 spec defines a 5 Mhz ultra-fast mode.

SPI is much simpler, a single master with no bus protocol beyond a chip select and no set maximum bus rate. If the distances are short then you can go as fast as you dare. Quite fast on an interconnect between chips that are less than an inch apart.

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Hans Passant Avatar answered Oct 12 '22 21:10

Hans Passant