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What is "false sharing"? How to reproduce / avoid it?

Today I got a different understand with my professor on the Parallel Programming class, about what is "false sharing". What my professor said makes little sense so I pointed it out immediately. She thought "false sharing" will cause a mistake in the program's result.

I said, "false sharing" happens when different memory address are assigned to the same cache line, writing data to one of it will cause another being kicked out of the cache. If the processors write between the two false sharing address turn and turn about, both of them could not stay on the cache so all operations will result in the access of DRAMs.

That's my opinion so far. In fact I'm not definitely sure about what I said either... If I got a misunderstanding just point it out please.

So there are some questions. The cache is assumed 64 bytes aligned, 4-way set-associative.

  1. Is it possible that two address separated by more than 64 bytes are “false sharing”?
  2. Is it possible that a single threaded program encountered a "false sharing" issue?
  3. What's the best code example to reproduce the "false sharing"?
  4. In general, what should be noted to avoid "false sharing" for programmers?
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Aean Avatar asked Mar 31 '14 15:03

Aean


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What is false sharing and how can we avoid it?

In general, false sharing can be reduced using the following techniques: Make use of private or threadprivate data as much as possible. Use the compiler's optimization features to eliminate memory loads and stores. Pad data structures so that each thread's data resides on a different cache line.

What is meant by false sharing?

In computer science, false sharing is a performance-degrading usage pattern that can arise in systems with distributed, coherent caches at the size of the smallest resource block managed by the caching mechanism.

What is false sharing and true sharing?

As I understand it, true sharing refers to the problem of multiple cores frequently writing to the same shared variable, while false sharing refers to multiple cores writing to different variables that are on the same cache line.

What is false sharing how does it contribute in increasing thrashing?

False sharing degrades performance when all of the following conditions occur. Shared data is modified by multiple processors. Multiple processors update data within the same cache line. This updating occurs very frequently (for example, in a tight loop).


1 Answers

I'll share my point of view on your questions.

  1. Two addresses that are separated by more bytes than block's size, won't reside on the exact same cache line. Thus, if a core has the first address in its cache, and another core requests the second address, the first won't be removed from cache because of that request. So a false sharing miss won't occur.

  2. I can't imagine how false sharing would occur when there's no concurrency at all, as there won't be anyone else but the single thread to compete for the cache line.

  3. Taken from here, using OpenMP, a simple example to reproduce false sharing would be:

    double sum=0.0, sum_local[NUM_THREADS];
    
    #pragma omp parallel num_threads(NUM_THREADS)
    {
        int me = omp_get_thread_num();
        sum_local[me] = 0.0;
    
        #pragma omp for
        for (i = 0; i < N; i++)
            sum_local[me] += x[i] * y[i];
    
        #pragma omp atomic
        sum += sum_local[me];
    }
    
  4. Some general notes that I can think of to avoid false sharing would be:

    a. Use private data as much as possible.

    b. Sometimes you can use padding in order to align data, to make sure that no other variables will reside in the same cache that shared data reside.

Any correction or addition is welcome.

like image 53
chrk Avatar answered Sep 22 '22 19:09

chrk