What does the target ".cpp.o:" mean in a Makefile?

Question

I'm learning the GNU makefile. I came across this page: http://mrbook.org/blog/tutorials/make/

At the end of this article, I found this:

CC=g++
CFLAGS=-c -Wall
LDFLAGS=
SOURCES=main.cpp hello.cpp factorial.cpp
OBJECTS=$(SOURCES:.cpp=.o)
EXECUTABLE=hello

all: $(SOURCES) $(EXECUTABLE)

$(EXECUTABLE): $(OBJECTS) 
    $(CC) $(LDFLAGS) $(OBJECTS) -o $@

.cpp.o:
    $(CC) $(CFLAGS) $< -o $@

Could anyone explain what's in OBJECT variable and what target .cpp.o: means (also the $< in it)?

I also found when I use something like:

SRC = $(wildcard $(SRC_DIR)*.c)
SRC_OBJS = $(patsubst %.c, %.o, $(SRC))

and use "$(SRC_OBJS)" as a target, it will compile all objects for each required object. This doesn't happen for the first one. What's the difference?

Answer 1

It's a suffix rule telling make how to turn file.cpp into file.o for an arbitrary file.

$< is an automatic variable referencing the source file, file.cpp in the case of the suffix rule.

$@ is an automatic variable referencing the target file, file.o.