During a lecture in class, these slides were presented and there wasn't much explanation.
These both seem to be explaining the same thing but I do not understand why there are two sided arrows for data reads or writes.
The first slide makes no sense to me because how could a virtual address be read from or written to without translating?
Is the second slide saying that once the CPU has the physical address it can read and write to it?
Virtual addresses must be translated. That is the virtual in virtual address. I read the slides as saying that a data read can be physical or virtual. Physical addresses don't need translation. The second slide introduces the tlb which is a cache used to avoid the direct read. Tlb typically uses some unused bits of the address to manage dirty and read only states. Google tlb for more information on the process.
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