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What does @: (at symbol colon) mean in a Makefile?

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What does colon mean in makefile?

In the first line, the list of target names is terminated by a colon. This, in turn, is followed by the dependency list, if there is one. If several targets are listed, this indicates that each such target is to be built independently using the rule supplied.

What does AT symbol do in makefile?

The @ symbol is commonly seen at the beginning of an action lines and means that the action line itself is not be be echoed on the screen as it is executed. Macros are commonly used in makefiles to decrease the amount of typing required.

What does the special symbol mean in makefile $@ $<?

Inside actions we can use: $@ to represent the full target name of the current target $? returns the dependencies that are newer than the current target $* returns the text that corresponds to % in the target $< returns the name of the first dependency $^ returns the names of all the dependencies with space as the ...

What does %O %c mean in makefile?

The simple answer is that %.o is a target that matches any file ending in .o. "%.o: %. c" means that any file ending in .o depends on the same filename ending in . c to be present.


It means "don't echo this command on the output." So this rule is saying "execute the shell command : and don't echo the output.

Of course the shell command : is a no-op, so this is saying "do nothing, and don't tell."

Why?

The trick here is that you've got an obscure combination of two different syntaxes. The make(1) syntax is the use of an action starting with @, which is simply not to echo the command. So a rule like

always:
       @echo this always happens

won't emit

   echo this always happens
   this always happens

Now, the action part of a rule can be any shell command, including :. Bash help explains this as well as anywhere:

$ help :
:: :
    Null command.

    No effect; the command does nothing.

    Exit Status:
    Always succeeds.

For those curious about why you might do this, it is useful if you want to pretend like something was done, so that Make doesn't output "Nothing to be done for" your target.

One example is if you have a phony target that you always execute, and in it you have a bunch of conditionals in the command. You want to have at least something in case those conditions come up false and nothing gets done.

For example (from Linux's scripts/Makefile.clean):

__clean: $(subdir-ymn)
ifneq ($(strip $(__clean-files)),)
    +$(call cmd,clean)
endif
ifneq ($(strip $(__clean-dirs)),)
    +$(call cmd,cleandir)
endif
ifneq ($(strip $(clean-rule)),)
    +$(clean-rule)
endif
    @: