Can anybody please explain the meaning of $< and $@ in a Makefile?
$< evaluates to the first "prerequisite" in the make rule, and $@ evaluates to the "target" in the make rule.
Here's an example:
file.o : file.c
$(CC) -c $(CFLAGS) $(CPPFLAGS) $< -o $@
In this case, $< will be replaced with file.c and $@ will be file.o.
These are more useful in generic rules like this:
%.o : %.c
$(CC) -c $(CFLAGS) $(CPPFLAGS) $< -o $@
See this manual for more info.
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